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NCP700 Ultra Low Noise, High PSSR, BiCMOS RF LDO Regulator
Noise sensitive RF applications such as Power Amplifiers in cell phones and precision instrumentation require very clean power supplies. The NCP700 is 150 mA LDO that provides the engineer with a very stable, accurate voltage with ultra low noise and very high Power Supply Rejection Ratio (PSRR) suitable for RF applications. In order to optimize performance for battery operated portable applications, the NCP700 employs an advanced BiCMOS process to combine the benefits of low noise and superior dynamic performance of bipolar elements with very low ground current consumption at full loads offered by CMOS. Furthermore, in order to provide a small footprint for space-conscious applications, the NCP700 is stable with small, low value capacitors and is available in a very small DFN6 2x2.2 package.
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6
MARKING DIAGRAM
1 6 PIN DFN MN SUFFIX CASE 506BA
* Output Voltage Options: * * * * * * * * * * * * *
- 1.8 V, 2.8 V, 3.0 V - Contact Factory for Other Voltage Options Ultra Low Noise (typ 15 mVrms) Very High PSRR (typ 80 dB) Stable with Ceramic Output Capacitors as low as 1 mF Low Sleep Mode Current (max 1 mA) Active Discharge Circuit Current Limit Protection Thermal Shutdown Protection These are Pb-Free Devices Cellular Telephones (Power Amplifier) Noise Sensitive Applications (Video, Audio) Analog Power Supplies PDAs / Palmtops / Organizers / GPS Battery Supplied Devices
XX = Specific Device Code M = Date Code G = Pb-Free Package (Note: Microdot may be in either location)
PIN ASSIGNMENT CE GND Vin 1 2 3 6 5 4 Cnoise GND Vout
(Top View)
Typical Applications
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet.
Vin
Vin Cin
Vout NCP700 CE Cnoise GND
Vout Cnoise
Cout
Figure 1. Typical Application Schematic
(c) Semiconductor Components Industries, LLC, 2007
1
May, 2007 - Rev. 0
Publication Order Number: NCP700/D
EE EE
XXMG G
NCP700
Vin
Vout
Cnoise
CE
Figure 2. Simplified Block Diagram PIN FUNCTION DESCRIPTION
DFN6 2x2.2 Pin No. 1 Pin Name CE Description Chip Enable: This pin allows on/off control of the regulator. To disable the device, connect to GND. If this function is not in use, connect to Vin. Internal 5 MW Pull Down resistor is connected between CE and GND. Power Supply Ground (Pins are fused for the DFN package) Power Supply Input Voltage Regulated Output Voltage Noise reduction pin. (Connect 100 nF or 10 nF capacitor to GND)
2, 5, EPAD 3 4 6
GND Vin Vout Cnoise
MAXIMUM RATINGS
Rating Input Voltage (Note 1) Chip Enable Voltage Noise Reduction Voltage Output Voltage Maximum Junction Temperature (Note 1) Storage Temperature Range Symbol Vin VCE VCnoise Vout TJ(max) TSTG Value -0.3 V to 6 V -0.3 V to Vin +0.3 V -0.3 V to Vin +0.3 V -0.3 V to Vin +0.3 V 150 -55 to 150 Unit V V V V C C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL-STD-883, Method 3015 Machine Model Method 200 V
THERMAL CHARACTERISTICS
Rating Package Thermal Resistance, DFN6: (Note 1) Junction-to-Lead (pin 2) Junction-to-Ambient Symbol RJA Value 37 120 Unit C/W
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area
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2
+
-
Bandgap Reference Voltage
Current Limit
Active Discharge
GND
NCP700
ELECTRICAL CHARACTERISTICS
(Vin = Vout + 1.0 V, VCE = 1.2 V, Cin = 0.1 mF, Cout = 1 mF, Cnoise = 10 nF, TA = -40C to 85C, unless otherwise specified (Note 2)) Characteristic REGULATOR OUTPUT Input Voltage Output Voltage (Note 3) 1.8 V 2.8 V 3.0 V 1.8 V 2.8 V 3.0 V Vin = (Vout +1.0 V) to 5.5 V Iout = 1 mA Vin = (Vout +1.0 V) to 5.5 V Iout = 1 mA to 150 mA Vin = Vout +1.0 V + 0.5 Vp- p Iout = 1 mA to 150 mA f = 120 Hz Cnoise = 100nF f = 1 kHz f = 10 kHz Vin = (Vout +1.0 V) to 5.5 V, Iout = 1 mA Iout = 1 mA to 150 mA f = 10 Hz to 100 kHz Iout = 1 mA to 150 mA Cnoise = 100 nF Cnoise = 10 nF Vout = Vout(nom) - 0.1 V Vout = 0 V 2.8 V 3.0 V Iout = 150 mA Vin Vout 2.5 1.764 2.744 2.940 1.746 2.716 2.910 Regline Regload Vn ILIM ISC VDO 150 150 15 20 310 320 105 100 470 490 155 150 mA mA mV -0.2 80 80 65 12 5.5 1.836 2.856 3.060 1.854 2.884 3.090 0.2 25 %/V mV mVrms V V Test Conditions Symbol Min Typ Max Unit
Output Voltage (Note 3)
Vout
V
Power Supply Ripple Rejection
PSRR
dB
Line Regulation Load Regulation Output Noise Voltage
Output Current Limit Output Short Circuit Current Dropout Voltage (Note 4) GENERAL Ground Current Disable Current Thermal Shutdown Threshold (Note 5) Thermal Shutdown Hysteresis (Note 5) CHIP ENABLE Input Threshold Low High
Iout = 1 mA Iout = 150 mA VCE = 0 V
IGND IDIS TSD TSH
-
70 110 0.1 150 20
90 220 1 -
mA mA C C
Vth(CE) RPD(CE)
1.2 2.5
5
0.4 10
V MW
Internal Pull-Down Resistance (Note 6) TIMING Turn-on Time Turn-of f Time Iout = 150 mA Cnoise = 10 nF/100 nF Cnoise = 10 nF Cnoise = 100 nF Iout = 1 mA Iout = 10 mA
ton toff
-
0.4 4 800 200
-
ms ms
2. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at TJ = TA = 25C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 3. Contact factory for other voltage options. 4. Measured when the output voltage falls 100 mV below the regulated voltage at Vin = Vout + 1.0 V If Vout < 2.5 V, then VDO = Vin - Vout at Vin = 2.5 V. 5. Guaranteed by design and characterization. 6. Expected to disable device when CE pin is floating.
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NCP700
TYPICAL CHARACTERISTICS
1.820 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 1.815 1.810 1.805 1.800 1.795 1.790 1.785 1.780 -40 -20 0 20 40 60 80 100 Iout = 1 mA Iout = 150 mA Vout = 1.8 V 2.820 2.815 2.810 2.805 2.800 Iout = 150 mA 2.795 2.790 2.785 2.780 -40 -20 0 20 40 60 80 100 Iout = 1 mA Vout = 2.8 V
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 3. Output Voltage vs. Temperature (Vout = 1.8 V)
3.020 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 3.015 3.010 3.005 3.000 2.995 2.990 2.985 2.980 -40 -20 0 20 40 60 80 100 Iout = 150 mA Iout = 1 mA Vout = 3.0 V 4.0
Figure 4. Output Voltage vs. Temperature (Vout = 2.8 V)
TA = 25C 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 1 2 3 4 5 6 Vout = 1.8 V Iout = 1 mA Vout = 3.0 V Vout = 2.8 V
TA, AMBIENT TEMPERATURE (C)
Vin, INPUT VOLTAGE (V)
Figure 5. Output Voltage vs. Temperature (Vout = 3.0 V)
140 IGND, GROUND CURRENT (mA) IGND, GROUND CURRENT (mA) 130 120 110 100 90 80 70 60 50 40 -40 -20 0 20 40 60 80 100 Iout = 1 mA Iout = 150 mA 200 180 160 140 120 100 80 60 40 20 0 0
Figure 6. Output Voltage vs. Input Voltage
TA = 25C
Vout = 3.0 V Vout = 2.8 V Iout = 150 mA Vout = 1.8 V
Iout = 1 mA
1
2
3
4
5
6
TA, AMBIENT TEMPERATURE (C)
Vin, INPUT VOLTAGE (V)
Figure 7. Ground Current vs. Temperature
Figure 8. Ground Current vs. Input Voltage
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NCP700
TYPICAL CHARACTERISTICS
125 VDO, DROPOUT VOLTAGE (mV) VDO, DROPOUT VOLTAGE (mV) 120 115 110 105 100 95 90 85 80 75 0 25 50 75 100 125 150 Iout, OUTPUT CURRENT (mA) TA = -40C TA = 25C Vout = 2.8 V TA = 85C 125 120 115 110 105 100 95 90 85 80 75 0 25 50 75 100 125 150 Iout, OUTPUT CURRENT (mA) TA = -40C TA = 25C Vout = 3.0 V TA = 85C
Figure 9. Dropout Voltage vs. Output Current
ISC, SHORT CIRCUIT CURRENT LIMIT (mA) 340 ILIM, CURRENT LIMIT (mA) 330 320 310 300 290 280 -40 350 340 330 320 310 300
Figure 10. Dropout Voltage vs. Output Current
-20
0
20
40
60
80
100
290 -40
-20
0
20
40
60
80
100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 11. Current Limit vs. Temperature
0 Vn, NOISE DENSITY (nV/Hz) -10 -20 -30 PSRR (dB) -40 -50 -60 -70 -80 -90 -100 Cnoise = 100 nF 10 100 1,000 f, FREQUENCY (Hz) 10,000 100,000 Cnoise = 10 nF TA = 25C Iout = 150 mA 700
Figure 12. Short Circuit Current vs. Temperature
TA = 25C 600 Iout = 150 mA 500 Cnoise = 100 nF 400 300 200 100 0 10 100 1,000 FREQUENCY (Hz) 10,000 100,000
Figure 13. PSRR vs. Frequency
Figure 14. Noise Density vs. Frequency
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NCP700
TYPICAL CHARACTERISTICS
4.2 V VCE 1 V/div Vin 500 mV/div 3.6 V TA = 25C Vout = 1.8 V Iout = 150 mA Cout = 1 mF Vout 10 mV/div
TA = 25C Vout 1 V/div Vin = 4 V Iout = 150 mA Cnoise = 0 nF
TIME (20 ms/div)
TIME (100 ms/div)
Figure 15. Enable Voltage and Output Voltage vs. Time (Start-Up)
10 ESR of OUTPUT CAPACITOR (W) TA = 25C
Figure 16. Line Transient
Unstable Region Vout = 3.0 V 1 Vout = 1.8 V Stable Region 0.1 Cout = 1 mF to 10 mF 0 25 50 75 100 125 150
Iout 100 mA/div
Vout 50 mV/div Vin = 2.8 V Vout = 1.8 V Cout = 1 mF
0.01 TIME (40 ms/div) Iout, OUTPUT CURRENT (mA)
Figure 17. Load Transient
Figure 18. Output Capacitor ESR vs. Output Current
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NCP700
APPLICATION INFORMATION
General Output Noise
The NCP700 is a 150 mA (current limited) linear regulator with a logic input for on/off control for the high speed turn-off output voltage. Access to the major contributor of noise within the integrated circuit is provided as the focus for noise reduction within the linear regulator system.
Power Up/Down
During power up, the NCP700 maintains a high impedance output (Vout) until sufficient voltage is present on Vin to power the internal bandgap reference voltage. When sufficient voltage is supplied (approx 1.2 V), Vout will start to turn on (assume CE shorted to Vin), linearly increasing until the output regulation voltage has been reached. Active discharge circuitry has been implemented to insure a fast turn off time. Then CE goes low, the active discharge transistor turns on creating a fast discharge of the output voltage. Power to drive this circuitry is drawn from the output node. This is to maintain the lowest quiescent current when in the sleep mode (VCE = 0.4 V). This circuitry subsequently turns off when the output voltage discharges.
CE (chip enable)
The main contributor for noise present on the output pin Vout is the reference voltage node. This is because any noise which is generated at this node will be subsequently amplified through the error amplifier and the PMOS pass device. Access to the reference voltage node is supplied directly through the Cnoise pin. Noise can be reduced from a typical value of 20 mVrms by using 10 nF to 15 mVrms by using a 100 nF from the Cnoise pin to ground. A bypass capacitor is recommended for good noise performance and better load transient response.
Thermal Shutdown
The enable function is controller by the logic pin CE. The voltage threshold of this pin is set between 0.4 V and 1.2 V. A voltage lower than 0.4 V guarantees the device is off. A voltage higher than 1.2 V guarantees the device is on. The NCP700 enters a sleep mode when in the off state drawing less than 1 mA of quiescent current. The device can be used as a simple regulator without use of the chip enable feature by tying the CE pin to the Vin pin.
Current Limit
When the die temperature exceeds the Thermal Shutdown threshold, a Thermal Shutdown (TSD) event is detected and the output (Vout) is turned off. There is no effect from the active discharge circuitry. The IC will remain in this state until the die temperature moves below the shutdown threshold (150C typical) minus the hysteresis factor (20C typical). This feature provides protection from a catastrophic device failure due to accidental overheating. It is not intended to be used as a substitute for proper heat sinking. The maximum device power dissipation can be calculated by:
PD + TJ * TA R qJA
Thermal resistance value versus copper area and package is shown in Figure 19.
380 RqJA, THERMAL RESISTANCE JUNCTION-T O-AMBIENT (C/W) 330 280 TSOP-5 (1 oz) 230 180 130 80 0 100 200 300 400 (mm2) PCB COPPER AREA DFN6 2x2.2 (2 oz) 500 600 700 TSOP-5 (2 oz) DFN6 2x2.2 (1 oz)
Output Current is internally limited within the IC to a minimum of 150 mA. The design is set to a higher value to allow for variation in processing and the temperature coefficient of the parameter. The NCP700 will source this amount of current measured with a voltage 100 mV lower than the typical operating output voltage. The specification for short circuit current limit (@ Vout = 0 V) is specified at 320 mA (typ). There is no additional circuitry to lower the current limit at low output voltages. This number is provided for informational purposes only.
Output Capacitor
The NCP700 has been designed to work with low ESR ceramic capacitors. There is no ESR lower limit for stability for the recommended 1 mF output capacitor. Stable region for Output capacitor ESR vs Output Current is shown in Figure 18.
Figure 19. RqJA vs. PCB Copper Area
(TSOP-5 for comparison only)
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NCP700
ORDERING INFORMATION
Device NCP700MN180R2G NCP700MN280R2G NCP700MN300R2G Nominal Output Voltage 1.8 V 2.8 V 3.0 V Marking LZ LX LY Package DFN6 2x2.2 Pb-Free Shipping 3000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
PACKAGE DIMENSIONS
6 PIN DFN, 2x2.2, 0.65P CASE 506BA-01 ISSUE O
D
A B
PIN ONE REFERENCE 2X
E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 b D D2 E E2 e K L L1 MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 0.30 2.00 BSC 1.10 1.30 2.20 BSC 0.70 0.90 0.65 BSC 0.20 --0.25 0.35 0.00 0.10
0.10 C
2X
0.10 C
0.10 C
7X
0.08 C
6X
L
K
BOTTOM VIEW
The products described herein (NCP700), may be covered by one or more U.S. patents.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
EE EE EE
1 6
TOP VIEW
A
SIDE VIEW A1 D2 e
3 6X
C
SEATING PLANE
L1
E2
4
6X
b 0.10 C A B 0.05 C
NOTE 3
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NCP700/D

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